The present invention relates to a charge-coupled device, and, more particularly, to a charge-coupled device and a method of manufacturing the same, in which the structure of a light-receiving region is changed to improve light sensitivity.
A conventional charge-coupled device will be described first, with reference to the attached drawings.
FIG. 1 is a layout diagram of the conventional charge-coupled device, in general.
FIGS. 2A to 2G are cross-sectional views taken along the line II--II in FIG. 1 for illustrating a manufacturing method. FIG. 3 is a diagram showing the process sequence of the conventional charge-coupled device.
The conventional charge-coupled device is composed of an insulating layer 20, a first P-type well 2 formed in a predetermined region of an N-type semiconductor substrate 1, a second P-type well 3 formed in a part excluding a light-receiving region within first P-type well 2, a PDN region 4 formed in a predetermined region within first P-type well 2, and a PDP.sup.+ region 5 formed in the upper surface of PDN region 4. PDP.sup.+ region 5 and PDN region 4 form photodiodes. BCCD region 6 is formed closer to one side of PDN region 4 and PDP.sup.+ region 5. A CST region 7 is formed for isolating BCCD region 6 and each photodiode region. Poly-gates I 8, and II 9 are formed to be insulated from each other on the upper side of BCCD region 6.
The manufacturing process of the aforementioned conventional charge-coupled device is as follows.
To begin with, as shown in FIGS. 2A and 2B, a P-type impurity ion-implantation is performed on a predetermined region of an N-type semiconductor substrate 1 to form a first P-type well 2 defining an active region.
Then, as shown in FIG. 2C, using a photoresist as a mask, another P-type impurity ion-implantation is performed in a part within first P-type well 2, thereby forming a second P-type well 3.
As shown in FIG. 2D, an ion-implantation is performed to form CST region 7. CST region 7 creates a potential barrier that isolates charges between the photodiode region and BCCD region 6.
As shown in FIG. 2E, a buried ion-implantation is performed on the CCD channel region to form BCCD region 6.
As shown in FIG. 2F, polysilicon is deposited on the entire surface of the resultant structure and patterned to form a poly-gate I 8 (not shown). After forming an interlayer insulating film (not shown) for insulating gates I and II from each other, polysilicon is deposited again and patterned to form a poly-gate II 9.
Then, using poly-gates I 8 and II 9 as masks, an N-type impurity ion is implanted in a light-receiving region, thereby forming PDN region 4.
Finally, as shown in FIG. 2G, an ion-implantation of a P-type impurity ion with high concentration is performed on the surface of PDN region 4, thereby forming a PDP.sup.+ region 5.
FIG. 3 summarizes the process sequence of the conventional charge-coupled device. First, in step 60, the secnd P-type well 3 is formed. In step 62, the ion implantation is performed to form the CST region 7. Similarly, in step 64, an ion implantation is performed to form BCCD region 6. In steps 66 and 68, the poly-gate I 8 and poly-gate II 9 are formed, respectively. In step 70, the ion implantation is performed to form the PDN region 4. Finally, in step 72, another ion implantation is performed to form PDP.sup.+ region 5.
In the conventional charge-coupled device as described above, BCCD region 6 is formed within second P-type well 3, so that the signal charge in BCCD region 6 moves without receiving the influence of SUB bias.
Further, as shown in FIG. 1, the CST layer surrounds most of the light-conversion region, but does not completely surround it. An opening in the CST region 7 is formed facing the nearest BCCD region. When a HIGH bias is applied to a gate serving as a transfer gate TG, the signal charge generated through light conversion is smoothly transferred to the BCCD region only through the opening part of CST region 7.
However, the conventional charge-coupled device in which the CST region formed as described above was not without its problems.
The width (W) of the CST layer, which is determined by the CST mask, exerts an important influence on the characteristics the charge-coupled device. If the width of the CST layer is large, the potential area for each light emitting section becomes small due to side effect. Further, as the width of the CST increases, the opening in the CST layer becomes smaller, which deteriorates the charge-transfer efficiency (CTE) in the CCD channel.
Limitations in existing mask-patterning equipment, such as a stepper, make it difficult to form the width of the CST region 7 with adequate precision to prevent the aforementioned problems. Accordingly, the sensitivity of the charge-coupled device is reduced.